Display panel

ABSTRACT

A display panel and a manufacturing method thereof are disclosed herein. The display panel includes a substrate, a peripheral circuit, a plurality of pixel electrodes, a plurality of switches, and an insulating layer. The substrate has a display region and a non-display region. At least a portion of the peripheral circuit is located on the display region of the substrate. The pixel electrodes are located on the display region of the substrate. The switches are respectively and electrically connected to the pixel electrodes, configured to be respectively switched on according to a plurality of scan signals, so as to transmit a plurality of data signals to the pixel electrodes. The insulating layer is located between the peripheral circuit and the pixel electrodes, and is configured to prevent the peripheral circuit from interfering with the pixel electrodes.

RELATED APPLICATIONS

This application claims priority to Taiwanese Application Serial Number102120432, filed Jun. 7, 2013, which is herein incorporated byreference.

BACKGROUND

1. Technical Field

The present disclosure relates to an electronic apparatus and amanufacturing method thereof. More particularly, the present inventionrelates to a display panel and a manufacturing method thereof.

2. Description of Related Art

With advances in technology, display panels are widely used in variouskinds of electronic devices, such as smartphones, tablet computers, ande-paper devices.

A display panel typically includes a substrate. The substrate includes adisplay region and a non-display region (i.e., a peripheral region).Typically, a peripheral circuit is disposed on the non-display region,and is configured to provide electrostatic discharge protection or totransmit signals to components on the display region. However, with sucha configuration, a space on the non-display region is needed where theperipheral circuit can be disposed, and such a restriction limits thedegree to which the rim of the display panel can be made thinner andsmaller.

Thus, in order to allow for more widespread use of the display panel, adisplay panel with a thin rim is desired.

SUMMARY

One aspect of the present invention is directed to a display panel. Inaccordance with one embodiment of the present invention, the displaypanel includes a substrate, a peripheral circuit, a plurality of pixelelectrodes, a plurality of switches, and an insulating layer. Thesubstrate includes a display region and a non-display region. At least aportion of the peripheral circuit is located on the display region. Thepixel electrodes are located on the display region. The switches arerespectively and electrically connected to the pixel electrodes. Theswitches are configured to be switched on according to a plurality ofscan signals respectively, so as to transmit a plurality of data signalsto the pixel electrodes. The insulating layer is located between theperipheral circuit and the pixel electrodes. The insulating layer isconfigured to prevent the peripheral circuit from interfering with thepixel electrodes.

Another aspect of the present invention is directed to a display panel.In accordance with one embodiment of the present invention, the displaypanel includes a substrate, a plurality of data lines, a plurality ofscan lines, a peripheral circuit, a plurality of pixel electrodes, aplurality of switches, a display layer, and an insulating layer. Thesubstrate includes a display region and a non-display region. The datalines are disposed on the substrate. The scan lines are disposed on thesubstrate and are intersected with the data lines. The peripheralcircuit is disposed on the substrate. The peripheral circuit isconfigured to be electrically connected to at least one of the datalines or at least one of the scan lines, and at least a portion of theperipheral circuit is located on the display region. The pixelelectrodes are located on the display region. The switches are disposedon the substrate and respectively and electrically connected to thepixel electrodes. The switches are configured to be turned onrespectively according to a plurality of scan signals to transmit aplurality of data signals to the pixel electrodes. The display layer islocated on the pixel electrodes. The display layer is configured todisplay an image according to the data signals received by the pixelelectrodes. The insulating layer is configured to overlay at least theportion of the peripheral circuit located on the display region toprevent the peripheral circuit from interfering with the pixelelectrodes.

Another aspect of the present invention is directed to a manufacturingmethod of a display panel. In accordance with one embodiment of thepresent invention, the manufacturing method includes providing asubstrate including a display region and a non-display region; disposinga peripheral circuit on the substrate, in which at least a portion ofthe peripheral circuit is located on the display region; forming aplurality of pixel electrodes located on the display region; forming aplurality of switches on the substrate, in which the switches areelectrically and respectively connected to the pixel electrodes, and theswitches are configured to be switched on according to a plurality ofscan signals respectively, so as to transmit a plurality of data signalsto the pixel electrodes; and forming an insulating layer located betweenthe peripheral circuit and the pixel electrodes, in which the insulatinglayer is configured to prevent the peripheral circuit from interferingwith the pixel electrodes.

Thus, through application of one of the embodiments mentioned above, aninsulating layer is disposed between the peripheral circuit and thepixel electrodes. With such a configuration, at least one portion of theperipheral circuit can be disposed on the display region withoutinterfering with the pixel electrodes. By disposing at least one portionof the peripheral circuit on the display region, the rim of the displaypanel can be minimized, such that a display panel with a thin rim can berealized.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be more fully understood by reading the followingdetailed description of the embodiment, with reference made to theaccompanying drawings as follows:

FIG. 1 a is a schematic diagram of a display panel in accordance withone embodiment of the present disclosure;

FIG. 1 b is a section view of the display panel in FIG. 1 along linex-x;

FIG. 2 a is a schematic diagram of another display panel in accordancewith one embodiment of the present disclosure;

FIG. 2 b is a section view of the display panel in FIG. 2 a along liney-y;

FIG. 3 a is a schematic diagram of still another display panel inaccordance with one embodiment of the present disclosure;

FIG. 3 b is a section view of the display panel in FIG. 3 a along linez-z; and

FIG. 4 is a flowchart illustrating a manufacturing method of a displaypanel in accordance with one embodiment of the present disclosure.

DETAILED DESCRIPTION

In the following detailed description, for purposes of explanation,numerous specific details are set forth in order to attain a thoroughunderstanding of the disclosed embodiments. It will be apparent,however, that one or more embodiments may be practiced without thesespecific details. In other instances, well-known structures and devicesare schematically shown in order to simplify the drawing.

It will be understood that, although the terms first, second, etc. maybe used herein to describe various elements, these elements should notbe limited by these terms. These terms are only used to distinguish oneelement from another. For example, a first element could be termed asecond element, and, similarly, a second element could be termed a firstelement, without departing from the scope of the embodiments.

It will be understood that when an element is referred to as being“connected” or “coupled” to another element, it can be directlyconnected or coupled to the other element or intervening elements may bepresent. In contrast, when an element is referred to as being “directlyconnected” or “directly coupled” to another element, there are nointervening elements present. Moreover, “electrically connect” or“connect” can further refer to the interoperation or interaction betweentwo or more elements.

Any element in a claim that does not explicitly state “means for”performing a specified function, or “step for” performing a specificfunction, is not to be interpreted as a “means” or “step” clause asspecified in 35 U.S.C. §112, 6th paragraph. In particular, the use of“step of” in the claims herein is not intended to invoke the provisionsof 35 U.S.C. §112, 6th paragraph.

One aspect of the present invention is a display panel. The displaypanel can be a liquid crystal display panel or an e-paper display panel.

Reference is now made to FIGS. 1 a and 1 b, in which FIG. 1 a is aschematic diagram of the display panel 100 in accordance with oneembodiment of the present disclosure, and FIG. 1 b is a section view ofthe display panel 100 in FIG. 1 along line x-x. In this embodiment, thedisplay panel 100 includes a substrate 110, a plurality of data lines120, a plurality of scan lines 130, a plurality of pixel electrodes 140,a plurality of switches 150, at least one peripheral circuit (e.g.,electrostatic discharge (ESD) protection circuits 160), an insulatinglayer 170, a display layer 180, and a transparent electrode layer 190.

In this embodiment, the data lines 120 are configured to transmit aplurality of data signals to the switches 150. The scan lines 130 areconfigured to transmit a plurality of scan signals to each row of theswitches sequentially. The switches 150 are, for example, thin filmtransistors (TFTs), and are configured to be turned on according to thescan signals to transmit the data signals to the pixel electrodes 140.The display layer 180 is, for example, an electronic ink material layer,and is configured to display an image according to the data signalsreceived by the pixel electrodes 140 (e.g., display the image accordingto the electrical field between the pixel electrodes 140 and thetransparent electrode layer 190).

The peripheral circuit is configured to be electrically connected to atleast one of the data lines 120 or at least one of the scan lines 130 totransmit signals to components on a display region 110 a of thesubstrate 110 or to provide electrostatic discharge protection. In thisembodiment, the at least one peripheral circuit includes a plurality ofESD protection circuits 160. The ESD protection circuits 160 areconfigured to be separately electrically connected to the data lines 120and the scan lines 130 to prevent the display panel 100 from beingdamaged by electrostatic discharge. For example, when electrostaticcharges are accumulated on the data lines 120 and the scan lines 130,the ESD protection circuits 160 can conduct the electrostatic charges onthe data lines 120 and the scan lines 130 to an electrostatic dischargering or the ground. In addition, the ESD protection circuits 160 canalso prevent external electrostatic charges from entering the displaypanel 100.

In one embodiment, the substrate 110 includes a display region 110 a anda non-display region 110 b. The data lines 120 are disposed on thesubstrate 110. The scan lines 130 are disposed on the substrate 110 andare intersected with the data lines 120. The ESD protection circuits 160are disposed on the substrate 110, in which at least a portion of theESD protection circuits 160 are located on the display region 110 a. Thepixel electrodes 140 are located on the display region 110 a and areoverlapped with at least a portion of the ESD protection circuits 160.That is, an orthogonal projection of the pixel electrodes 140 on thesubstrate 110 is at least partially overlapped with an orthogonalprojection of the ESD protection circuits 160 on the substrate 110. Theswitches 150 are disposed on the substrate 110. The display layer 180 islocated on the pixel electrodes 140. The transparent electrode layer 190is located on the display layer 180. The insulating layer 170 is locatedbetween the ESD protection circuits 160 and the pixel electrodes 140 toprevent the ESD protection circuits 160 from interfering with the pixelelectrodes 140. In addition, in some embodiments, the insulating layer170 can overlay a portion of the ESD protection circuits 160, in whichsaid portion of the ESD protection circuits 160 is located on thedisplay region 110 a, or can totally overlay the ESD protection circuits160. Moreover, in some embodiments, the thickness of a portion of theinsulating layer 170 interposed between the ESD protection circuits 160and the pixel electrodes 140 is greater than 15 kÅ, so as to prevent theESD protection circuits 160 from interfering with the pixel electrodes140.

By disposing the insulating layer 170 between the peripheral circuit(e.g., ESD protection circuits 160) and the pixel electrodes 140, atleast one portion of the peripheral circuit can be disposed on thedisplay region 110 a without interfering with the pixel electrodes 140.By disposing at least one portion of the peripheral circuit on thedisplay region 110 a, the size of the rim of the display panel 100(e.g., width a, b) can be minimized, such that a display panel with athin rim can be realized.

In some embodiments, the substrate 110, for example, can be fabricatedby glass, quartz, or flexible materials. The data lines 120 and the scanlines 130 can be fabricated by aluminum, chromium, aluminum alloy,chromium alloy, or other suitable conducting materials. The pixelelectrodes 140, for example, can be fabricated by metal, indium tinoxide, indium zinc oxide, or other suitable materials. The ESDprotection circuits 160, for example, can be implemented by thin filmtransistors or diodes. The insulating layer 170, for example, can befabricated by silicon nitride, silicon oxide, silicon oxynitride,aluminum oxide, hafnium oxide, or other suitable insulating materials.The transparent electrode layer 190, for example, can be fabricated byindium tin oxide, indium zinc oxide, or other suitable transparentconducting materials. In some embodiments, the display layer 180, forexample, includes a plurality of mini capsules and each capsule includesblack paint, white paint and transparent fluid. The black paint and thewhite paint separately have different electric charges (e.g., a positivecharge and a negative charge), so as to display an image according tothe electrical field between the pixel electrodes 140 and thetransparent electrode layer 190. However, in practice, the display layer180 can also be a liquid crystal material layer or another type ofelectronic ink material layer. Thus, the type of the display layer 180is not limited to the embodiment described above.

In the following paragraphs, more details of the invention are providedwith reference to another embodiment. Reference is made to FIGS. 2 a and2 b, in which FIG. 2 a is a schematic diagram of a display panel 200 inaccordance with one embodiment of the present disclosure, and FIG. 2 bis a section view of the display panel 200 in FIG. 2 a along line y-y.In this embodiment, the display panel 200 includes a substrate 210, aplurality of data lines 220, a plurality of scan lines 230, a pluralityof pixel electrodes 240, a plurality of switches 250, at least oneperipheral circuit (e.g., an amorphous silicon array driver (ARD) 262),an insulating layer 270, a display layer 280, and a transparentelectrode layer 290. The substrate 210 includes a display region 210 aand a non-display region 210 b.

In this embodiment, the functions and the configurations of thecomponents above are similar to the embodiment in FIGS. 1 a and 1 b.Therefore, aspects of this embodiment that are similar to those of theprevious embodiment will not be repeated.

In this embodiment, the at least one peripheral circuit includes an ARD262. The ARD 262 is configured to be electrically connected with thescan lines 230, and generate the scan signals and provide the scansignals to the switches 250, so as to turn on the switches 250 and makethe switches 250 provide the data signals to the pixel electrodes 240.

In this embodiment, the ARD 262 is disposed on the substrate 210, inwhich at least a portion of the ARD 262 is located on the display region210 a. Also, at least a portion of the ARD 262 is overlapped with thepixel electrodes 240. That is, an orthogonal projection of the pixelelectrodes 240 on the substrate 210 is at least partially overlappedwith an orthogonal projection of the ARD 262 on the substrate 210. Theinsulating layer 270 is located between the ARD 262 and the pixelelectrodes 240 to prevent the ARD 262 from interfering with the pixelelectrodes 240. In addition, in some embodiments, the insulating layer270 can overlay a portion of the ARD 262, in which said portion of theARD 262 is located on the display region 210 a, or can totally overlaythe ARD 262. Moreover, in some embodiments, the thickness of a portionof the insulating layer 270 interposed between the ARD 262 and the pixelelectrodes 240 is greater than 15 kÅ, so as to prevent the ARD 262 frominterfering with the pixel electrodes 240.

In one embodiment, the ARD 262, for example, can be implemented by thinfilm transistors.

By using the ARD 262 to generate the scan signals, a scan integratedcircuit traditionally used for generating scan signals can be omittedfrom the configuration of the display panel 200, such that the cost ofmanufacturing the display panel 200 can be minimized. In addition,through the configurations described above, the peripheral circuit(e.g., the ARD 262) can be disposed on the display region 210 a withoutinterfering with the pixel electrodes 240. Hence, a display panel 200with a thin rim can be realized.

In the following paragraphs, more details of the invention are providedwith reference to another embodiment. Reference is made to FIGS. 3 a and3 b, in which FIG. 3 a is a schematic diagram of a display panel 300 inaccordance with one embodiment of the present disclosure, and FIG. 3 bis a section view of the display panel 300 in FIG. 3 a along line z-z.In this embodiment, the display panel 300 includes a substrate 310, aplurality of data lines 320, a plurality of scan lines 330, a pluralityof pixel electrodes 340, a plurality of switches 350, at least oneperipheral circuit (e.g., a shorting bar line 364), an insulating layer370, a display layer 380, and a transparent electrode layer 390. Thesubstrate 310 includes a display region 310 a and a non-display region310 b.

In this embodiment, the functions and the configurations of thecomponents above are similar to the embodiment in FIGS. 1 a and 1 b.Therefore, aspects of this embodiment that are similar to those of thisprevious embodiment will not be repeated.

In this embodiment, the at least one peripheral circuit includes ashorting bar line 364. The shorting bar line 364 is configured to beelectrically connected to the data lines 320 and/or the scan lines 330.Although in FIG. 3 a the shorting bar line 364 is merely electricallyconnected to the scan lines 330, the invention is not limited to theconnection shown in FIG. 3 a. In an array test, the shorting bar line364 is configured to receive a test signal from a test pin, and providethe test signal to at least one of the switches 350 through the datalines 320 and/or scan lines 330 to turn on the at least one of theswitches 350, so as to perform testing of the display panel 300.

In this embodiment, the shorting bar line 364 is disposed on thesubstrate 310, in which at least a portion of the shorting bar line 364is located on the display region 310 a. Also, at least a portion of theshorting bar line 364 is overlapped with the pixel electrodes 340. Thatis, an orthogonal projection of the pixel electrodes 340 on thesubstrate 310 is at least partially overlapped with an orthogonalprojection of the shorting bar line 364 on the substrate 310. Theinsulating layer 370 is located between the shorting bar line 364 andthe pixel electrodes 340 to prevent the shorting bar line 364 frominterfering with the pixel electrodes 340. In addition, in someembodiments, the insulating layer 370 can overlay a portion of theshorting bar line 364, in which said portion of the shorting bar line364 is located on the display region 310 a, or can totally overlay theshorting bar line 364. Moreover, in some embodiments, the thickness of aportion of the insulating layer 370 interposed between the shorting barline 364 and the pixel electrodes 340 is greater than 15 kÅ, so as toprevent the shorting bar line 364 from interfering with the pixelelectrodes 340.

In one embodiment, the shorting bar line 364 can be fabricated with amaterial identical to the material of the data lines 320 and the scanlines 330.

Through the configurations described above, the peripheral circuit(e.g., the shorting bar line 364) can be disposed on the display region310 a without interfering with the pixel electrodes 340. Hence, adisplay panel with a thin rim can be realized.

It should be noted that although in FIGS. 1 a, 1 b, 2 a, 2 b, 3 a, and 3b the peripheral circuit is partially disposed on the display region 110a, 210 a, 310 a, and partially disposed on the non-display region 110 b,210 b, 310 b, in practice, the peripheral circuit can be totallydisposed on the display region 110 a, 210 a, 310 a, and the dispositionthereof is not limited to the embodiment in shown in FIGS. 1 a, 1 b, 2a, 2 b, 3 a, and 3 b.

Moreover, in some embodiments, the peripheral circuit can includeanother electronic component, such as a peripheral wire configured totransmit the scan signals or the data signals. The actual content of theperipheral circuit is based on actual requirements, and is not limitedto the embodiment above.

Furthermore, in some embodiments, all the ESD protection circuit 160,the ARD 262, and the shorting bar line 364 can be disposed in onedisplay panel, and at least one portion of each of the ESD protectioncircuit 160, the ARD 262, and the shorting bar line 364 is disposed onthe display region.

Another aspect of the invention is a manufacturing method of a displaypanel. The display panel herein, for example, can be one of the displaypanels 100, 200, 300 in FIGS. 1 a, 1 b, 2 a, 2 b, 3 a, and 3 b. Tosimplify the description below, in the following paragraphs, the displaypanel 100 shown in FIGS. 1 a and 1 b will be used as an example todescribe the manufacturing method according to an embodiment of thepresent disclosure. However, the invention is not limited to applicationto the embodiment shown in FIGS. 1 a and 1 b.

FIG. 4 is a flowchart illustrating a manufacturing method 400 of thedisplay panel 100 in accordance with one embodiment of the presentdisclosure. It should be noted that in the steps of the followingmanufacturing method, no particular sequence is required unlessotherwise specified. Moreover, the following steps also may be performedsimultaneously or the execution times thereof may at least partiallyoverlap. The manufacturing method 400 includes the steps below.

In step S1, a substrate 110 including a display region 110 a and anon-display region 110 b is provided. In step S2, a peripheral circuit(e.g., an ESD protection circuit 160) is formed on the substrate 110, inwhich at least a portion of the peripheral circuit is located on thedisplay region 110 a. In step S3, a plurality of switches 150 are formedon the substrate 110. In step S4, an insulating layer 170 is formed onthe peripheral circuit. In step S5, a plurality of pixel electrodes 140are formed on display region 110 a, and are electrically connected tothe switches 150 respectively.

In the steps above, the insulating layer 170 is located between theperipheral circuit and the pixel electrodes 140 to prevent theperipheral circuit from interfering with the pixel electrodes 140. Inaddition, the switches 150 can be turned on according to a plurality ofscan signals separately to transmit a plurality of data signals to thepixel electrodes 140.

In one embodiment, the peripheral circuit includes at least one of theESD protection circuits 160 shown in FIG. 1 a and FIG. 1 b, the ARD 262shown in FIG. 2 a and FIG. 2 b, and the shorting bar line 364 shown inFIG. 3 a and FIG. 3 b.

Details of the components in the display panel 100, the ARD 262, and theshorting bar line 364 can be ascertained by referring to the aboveparagraphs, and a description in this regard will not be repeatedherein.

It will be apparent to those skilled in the art that variousmodifications and variations can be made to the structure of the presentinvention without departing from the scope or spirit of the invention.In view of the foregoing, it is intended that the present inventioncover modifications and variations of this invention provided they fallwithin the scope of the following claims.

What is claimed is:
 1. A display panel comprising: a substrate comprising a display region and a non-display region; a peripheral circuit, wherein at least a portion of the peripheral circuit is located on the display region; a plurality of pixel electrodes located on the display region; a plurality of switches respectively and electrically connected to the pixel electrodes, wherein the switches are configured to be switched on according to a plurality of scan signals respectively, so as to transmit a plurality of data signals to the pixel electrodes; and an insulating layer located between the peripheral circuit and the pixel electrodes, wherein the insulating layer is configured to prevent the peripheral circuit from interfering with the pixel electrodes; wherein the peripheral circuit comprises a shorting bar line, at least a portion of the shorting bar line is located on the display region, and the shorting bar line is configured to receive a test signal and to provide the test signal to at least one of the switches to thereby perform testing of the display panel.
 2. The display panel as claimed in claim 1 further comprising: a display layer configured to display an image according to the data signals received by the pixel electrodes.
 3. The display panel as claimed in claim 1, wherein the peripheral circuit comprises an amorphous silicon array driver (ARD), at least a portion of the ARD is located on the display region, and the ARD is configured to provide the scan signals to the switches.
 4. The display panel as claimed in claim 3 further comprising: a display layer configured to display an image according to the data signals received by the pixel electrodes.
 5. The display panel as claimed in claim 1, wherein the peripheral circuit comprises an electrostatic discharge (ESD) protection circuit, at least a portion of the ESD protection circuit is located on the display region, and the ESD protection circuit is configured to electrically connect to a scan line or a data line, so as to prevent the display panel from being damaged by electrostatic discharge.
 6. The display panel as claimed in claim 5 further comprising: a display layer configured to display an image according to the data signals received by the pixel electrodes.
 7. The display panel as claimed in claim 1 further comprising: a display layer configured to display an image according to the data signals received by the pixel electrodes.
 8. The display panel as claimed in claim 1, wherein a thickness of a portion of the insulating layer interposed between the peripheral circuit and the pixel electrodes is greater than 15 kÅ. 